The present invention relates in general to semiconductor device fabrication and, more particularly, to uniform plating of metal bumps on the surface of a semiconductor wafer.
With recent advances in semiconductor fabrication technology, transistors in the submicron range have allowed a very large number of transistors to be formed on one semiconductor device. With the large number of transistors and corresponding circuit nodes, the semiconductor device often requires a large number of electrical contacts to pass electrical signals to and from the device.
The electrical contacts are commonly formed by using pin grid arrays (PGA), or ball grid arrays (BGA). The array of contacts may be formed by plating an array of metal bumps on the semiconductor device while still in wafer form. Ideally, the plating process to form the metals bumps should produce metal bumps of uniform height and flat-end surface in order to make good bonding to a device package, such as flip-chip or tape automated bonding (TAB). The plating process should avoid over-plating and flow effects which can cause shorts between the metal bumps.
In the prior art, for example as described in U.S. Pat. No. 5,000,827, the plating process may occur in a plating container having an open top and an inlet at the bottom. The semiconductor wafer is suspended over the top of the plating container. Predetermined sites of the semiconductor wafer where the metal bumps are to be formed are patterned by a photolithography process to mask all areas but the plating sites. A round metal anode plate with an array of openings evenly spaced about its entire surface, or in the form of a mesh, is placed typically at the bottom of the plating container over the plating solution inlet. A voltage source is applied between the metal anode plate and the semiconductor wafer. The plating solution circulates through the inlet and anode plate throughout the container whereby the plating solution is deposited at the predetermined sites on the semiconductor wafer by an electroplating process.
A uniform flow is important during the electroplating process to provide even deposition of the metal ions from the plating solution onto the plating sites. Unfortunately, the prior art arrangement does not consistently result in the desired uniform height of the metal bumps in part because of the non-uniform flow of plating solution in and around the semiconductor wafer. The placement of openings in the anode plate and its position at the bottom of the plating container cause a turbulence in the plating container resulting in the uneven flow of plating solution.
As the plating solution enters the plating container, it flows directly through the mesh network of the anode. The plating solution flow rate is greater nearer to the center of the inner cavity than it is around the walls of the container. That is, the plating solution flows straight up through the center of the container, strikes the semiconductor wafer, flows laterally toward the walls, and then circulates back down the walls toward the bottom of the contain causing the turbulent flow. The flow rate near the center of semiconductor wafer is thus greater than in the peripheral region as the plating solution velocity slows down. Thus, the non-uniform flow rate of the plating solution as it flows laterally across the plating sites results in non-uniform height in metal bumps. Furthermore, the prior art plating process has problems with shorts between the closely positioned metals bumps. The manufacturing defects result in rejection of defective semiconductor wafers and subsequent increase in manufacturing cost.
Hence, a need exists for a plating process that produces isolated bumps of uniform height.